Micron has officially begun mass production of the 9650 NVMe SSD, making it the world’s first PCIe Gen 6 data center drive to reach that milestone. The drive delivers sequential read speeds of up to 28 GB/s, a number that, on paper, surpasses the theoretical 25.6 GB/s bandwidth ceiling of single-channel DDR4-3200 memory.
It also doubles the sequential read performance of the fastest PCIe Gen 5 SSDs currently on the market, which top out around 14 GB/s, while Gen 4 drives sit closer to 7 GB/s. Sequential write speeds on the 9650 reach 14 GB/s, random read performance hits up to 5.5 million IOPS, and random write performance lands at 900,000 IOPS, all within a 25-watt power envelope, the same consumed by the most power-hungry enterprise PCIe Gen 5 drives today.
The 9650 comes in two variants, Pro and Max, available in E1.S and E3.S enterprise form factors. The Pro series targets read-intensive workloads and comes in capacities of 7.68 TB, 15.36 TB, and 30.72 TB. The Max series is built for mixed-use cases and offers 6.4 TB, 12.8 TB, and 25.6 TB options.
Both variants use Micron’s ninth-generation G9 TLC NAND and support air and liquid cooling configurations. The drive was built specifically for AI training and inference workloads in hyperscale data center environments, not for consumer desktops or gaming rigs.
To achieve those speeds, PCIe 6.0 adopts PAM-4 signaling, pulse amplitude modulation with four levels, combined with forward error correction, pushing the interface to 64 gigatransfers per second per lane. That’s a fundamentally different technical approach compared to previous generations, and a big part of why it took this long to show up in production hardware.
Faster than DDR4, but the full picture is more nuanced
The “faster than DDR4” headline is technically accurate, but only for single-channel DDR4-3200. Consumer platforms running dual-channel configurations, or anyone already on DDR5, operate at significantly higher aggregate bandwidths, around 100 GB/s or more. So the comparison is real, but it applies to a specific scenario, not to the average gaming or workstation PC sitting on most desks right now.
For gamers specifically, the 9650 is a non-event in the short term. The drive ships in enterprise form factors that are physically incompatible with consumer motherboards, and there are no PCIe Gen 6-compatible consumer CPUs from Intel or AMD yet, those are expected to arrive in the datacenter space later in 2026, with consumer platforms lagging further behind.
Silicon Motion’s CEO Wallace Kou stated at COMPUTEX 2025 that consumer PCIe 6.0 SSDs are unlikely to reach the market before 2030, citing signal degradation issues at higher speeds, PCIe 6.0 signals travel only 3.4 inches on copper versus 11 inches for PCIe 4.0, along with the cost of retimer chips at around $20 per unit and the absence of consumer platform support from AMD and Intel.
For context, current games barely stress PCIe 4.0 drives in real-world use. Even with DirectStorage enabling faster asset streaming directly to the GPU, the difference between Gen 4 and Gen 5 in gaming scenarios is marginal at best. The bottleneck for games today has nothing to do with storage bandwidth ceilings, it has to do with how game engines are designed to load and stream data, and most of them weren’t built to exploit what’s already available.
What it means for system architecture going forward
The bigger story behind the 9650 is what PCIe Gen 6 represents for how systems are being designed at the infrastructure level. AMD’s upcoming EPYC “Venice” server CPUs, based on the Zen 6 architecture and expected to launch in 2026, will implement PCIe Gen 6 support and are projected to deliver up to 1.6 TB/s of memory bandwidth per socket, more than double the 614 GB/s offered by current EPYC processors, alongside a doubling of CPU-to-GPU bandwidth.
That kind of leap signals that PCIe Gen 6 is already baked into the next generation of enterprise computing architecture.
On the memory side, Samsung and SK Hynix are both developing CXL memory solutions that use high-speed PCIe connections to let multiple servers dynamically share large pools of memory. Samsung’s upcoming CMM-D 3.1 module is planned to support CXL 3.0 over a PCIe Gen 6 interface, with capacities scaling up to 1 TB and bandwidth of up to 72 GB/s per module, designed specifically for memory pooling and sharing across multiple hosts.
This is a meaningful shift in how data center architects are thinking about memory, not as a fixed resource tied to a single machine, but as something that can be disaggregated and shared dynamically across systems.
For consumers, the direct impact is years away. But the pattern is familiar: technologies that redefine server infrastructure eventually reshape what lands in gaming PCs and workstations. PCIe Gen 4 went through the same cycle. So did DDR5. The Micron 9650 is a datacenter product today, but what it validates, both technically and commercially, is the foundation that consumer Gen 6 hardware will eventually be built on.
What do you think, are you excited about where PCIe Gen 6 is headed, or does 2030 feel too far away to care? Tell us in the comments!